Electronic System Level (ESL) design and verification is an emerging electronic design methodology that focuses on the higher abstraction level concerns first and foremost.
It is defined in the ESL Design and Verification book [1] as: "the utilization of appropriate abstractions in order to increase comprehension about a system, and to enhance the probability of a successful implementation of functionality in a cost-effective manner."
The basic premise is to model the behavior of the entire system using a high-level language such as C, C++, or MATLAB.
Rapid and correct-by-construction implementation of the system can be automated using EDA and embedded software tools, although much of it is performed manually today.
ESL can also be accomplished through the use of SystemC as an abstract modeling language.
Electronic System Level is now an established approach at most of the world’s leading System-on-a-chip (SoC) design companies, and is being used increasingly in system design.
From its genesis as an algorithm modeling methodology with ‘no links to implementation’, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification, and debugging through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems.
Source: Wikipedia (http://en.wikipedia.org/wiki/Electronic_system_level)